FAQ: D-Wave's Advanced Cryogenic Packaging Initiative for Quantum Processor Scalability

What is D-Wave’s new initiative about?

D-Wave has launched a strategic development program to expand its capabilities in cryogenic packaging for both gate-model and annealing quantum processors, focusing on advancing and scaling quantum processor technology.

Why is cryogenic packaging important for quantum computing?

Cryogenic packaging plays a central role in quantum computing performance and scalability as it involves housing and interconnecting quantum processor components in extremely low-temperature environments, which is essential for quantum operations.

What specific capabilities will this initiative expand?

The program will expand multichip packaging capabilities, manufacturing equipment, and processes to support the development of more advanced quantum processors.

Who is D-Wave collaborating with for this initiative?

D-Wave is leveraging expertise from NASA’s Jet Propulsion Laboratory (JPL) for superconducting bump-bond technology to support this cryogenic packaging development.

What is the ultimate goal of this packaging initiative?

The goal is to increase interconnectivity and scalability for quantum computing architectures, specifically targeting systems capable of reaching 100,000 qubits.

What types of quantum processors will benefit from this technology?

Both gate-model and annealing quantum processors will benefit from the advanced cryogenic packaging technology being developed through this initiative.

How does this initiative support D-Wave’s overall strategy?

This initiative underscores D-Wave’s focus on hardware innovation to support its long-term technology roadmap for quantum computing systems development.

Where can investors find more information about D-Wave (QBTS)?

The latest news and updates relating to QBTS are available in the company’s newsroom at https://ibn.fm/QBTS, as noted in the forward-looking statements section.